CDBM CDBC Dual J-K Master Slave. Flip-Flop with Set and Reset. General Description. These dual J-K flip-flops are monolithic complementary. These dual J-K flip-flops are monolithic complementary. MOS (CMOS) integrated circuits constructed with N- and P- channel enhancement mode transistors. Pin−for−Pin Replacement for CDB. • NLV Prefix for dimensions section on page 2 of this data sheet. . Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3.

Author: Shaktigore Yozshujar
Country: Antigua & Barbuda
Language: English (Spanish)
Genre: Business
Published (Last): 11 September 2008
Pages: 419
PDF File Size: 9.84 Mb
ePub File Size: 14.21 Mb
ISBN: 967-2-87799-809-8
Downloads: 16142
Price: Free* [*Free Regsitration Required]
Uploader: Moogurisar


Following datasneet safety standards, primarily these inputs also need to be assigned to a logic level, preferably to the ground terminal for the present IC, via sufficiently high value resistors. Gently adjust and fix the IC on the veroboard somewhere over the center of the board by soldering.

Here we can see how the above discussed operating principle of the IC is practically set up for a useful purpose.

The signals produces a bistable effect over one of the free outputs, the other being connected to the Data input as explained above.


The IC can be also effectively used for switching any load through input signals received from a sound sensor. Complementary Ouputs Pins 1, 2, and 13, Pinouts of the IC The D-type blocks consist of four inputs, explained as follows: The circuit shown can be used for iv any load simply by touching the touch pad.

After all the connections are made, have a quick glance and make sure that all have been wired as daatsheet the diagram, if possible brush-clean the solder side with thinner.

D-type flip flops refer to circuits which may have a couple of outputs that change or dwtasheet states in response datahseet triggers applied at the input terminals. The diagram illustrates how a IC may be set up for testing its fundamental bistable operation and how it can be further applied for practical uses.

Positive input Pin Yet another important feature of the IC which enables the bistable operation through two different inputs.

Datasheet(PDF) – TI store

This input is used for receiving clock signals which are normally in the form of square waves. The sets of outputs change states when operated in the bistable mode or while setting and resetting the IC, always producing opposite logic levels at any instant.


The signal may be applied externally through a transistor astable multivibrator or more conventional types using NAND gates or NOR gates. This pin receives the positive supply input, which must never exceed 15 volts DC.

National Semiconductor

The astable clocks can be datasehet through LED1. For other configurations this input is terminated to any of the logic levels, i. The IC incorporates two sets of identical, discrete data-type or D-type flip flop modules.

Pressing S2 now, just flips the status of the output to its original position. Set and Reset Inputs Pins 4, 6 and 10, 8: Pin 7 is the ground or negative supply input of the IC. Data Input Pins 5 and 9: Clock Input Pins 3 and The set up shown can be simply built with the help of the diagram.

The configurations can be repeated by connecting the modules in series for getting the time period to any desired lengths, but in multiples of two.